arch/arm/boot/dts/nvidia/tegra124-nyan-blaze.dts

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nvidia/tegra124-nyan-blaze.dts

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/nvidia/tegra124-nyan-blaze.dts
Extension
.dts
Size
41410 bytes
Lines
1347
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/dts-v1/;

#include "tegra124-nyan.dtsi"

#include "tegra124-nyan-blaze-emc.dtsi"

/ {
	model = "HP Chromebook 14";
	compatible = "google,nyan-blaze-rev10", "google,nyan-blaze-rev9",
		     "google,nyan-blaze-rev8", "google,nyan-blaze-rev7",
		     "google,nyan-blaze-rev6", "google,nyan-blaze-rev5",
		     "google,nyan-blaze-rev4", "google,nyan-blaze-rev3",
		     "google,nyan-blaze-rev2", "google,nyan-blaze-rev1",
		     "google,nyan-blaze-rev0", "google,nyan-blaze",
		     "google,nyan", "nvidia,tegra124";

	host1x@50000000 {
		dpaux@545c0000 {
			aux-bus {
				panel: panel {
					compatible = "samsung,ltn140at29-301";
					power-supply = <&vdd_3v3_panel>;
					backlight = <&backlight>;
				};
			};
		};
	};

	pinmux@70000868 {
		pinctrl-names = "default";
		pinctrl-0 = <&pinmux_default>;

		pinmux_default: pinmux {
			clk_32k_out_pa0 {
				nvidia,pins = "clk_32k_out_pa0";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			uart3_cts_n_pa1 {
				nvidia,pins = "uart3_cts_n_pa1";
				nvidia,function = "gmi";
				nvidia,pull = <TEGRA_PIN_PULL_DOWN>;
				nvidia,tristate = <TEGRA_PIN_ENABLE>;
				nvidia,enable-input = <TEGRA_PIN_DISABLE>;
			};
			dap2_fs_pa2 {
				nvidia,pins = "dap2_fs_pa2";
				nvidia,function = "i2s1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			dap2_sclk_pa3 {
				nvidia,pins = "dap2_sclk_pa3";
				nvidia,function = "i2s1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			dap2_din_pa4 {
				nvidia,pins = "dap2_din_pa4";
				nvidia,function = "i2s1";
				nvidia,pull = <TEGRA_PIN_PULL_NONE>;
				nvidia,tristate = <TEGRA_PIN_DISABLE>;
				nvidia,enable-input = <TEGRA_PIN_ENABLE>;
			};
			dap2_dout_pa5 {
				nvidia,pins = "dap2_dout_pa5";

Annotation

Implementation Notes