arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-memory-timings.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-memory-timings.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nvidia/tegra30-asus-nexus7-grouper-memory-timings.dtsi- Extension
.dtsi- Size
- 55989 bytes
- Lines
- 1578
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/ {
memory-controller@7000f000 {
emc-timings-0 {
nvidia,ram-code = <0>; /* Elpida EDJ2108EDBG-DJL-F */
timing-25500000 {
clock-frequency = <25500000>;
nvidia,emem-configuration = <
0x00020001 /* MC_EMEM_ARB_CFG */
0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
0x00000001 /* MC_EMEM_ARB_TIMING_RP */
0x00000002 /* MC_EMEM_ARB_TIMING_RC */
0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
0x06020102 /* MC_EMEM_ARB_DA_TURNS */
0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
0x74830303 /* MC_EMEM_ARB_MISC0 */
0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
>;
};
timing-51000000 {
clock-frequency = <51000000>;
nvidia,emem-configuration = <
0x00010001 /* MC_EMEM_ARB_CFG */
0xc0000020 /* MC_EMEM_ARB_OUTSTANDING_REQ */
0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
0x00000001 /* MC_EMEM_ARB_TIMING_RP */
0x00000002 /* MC_EMEM_ARB_TIMING_RC */
0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */
0x00000008 /* MC_EMEM_ARB_TIMING_WAP2PRE */
0x00000002 /* MC_EMEM_ARB_TIMING_R2R */
0x00000001 /* MC_EMEM_ARB_TIMING_W2W */
0x00000002 /* MC_EMEM_ARB_TIMING_R2W */
0x00000006 /* MC_EMEM_ARB_TIMING_W2R */
0x06020102 /* MC_EMEM_ARB_DA_TURNS */
0x000a0502 /* MC_EMEM_ARB_DA_COVERS */
0x73430303 /* MC_EMEM_ARB_MISC0 */
0x001f0000 /* MC_EMEM_ARB_RING1_THROTTLE */
>;
};
timing-102000000 {
clock-frequency = <102000000>;
nvidia,emem-configuration = <
0x00000001 /* MC_EMEM_ARB_CFG */
0xc0000030 /* MC_EMEM_ARB_OUTSTANDING_REQ */
0x00000001 /* MC_EMEM_ARB_TIMING_RCD */
0x00000001 /* MC_EMEM_ARB_TIMING_RP */
0x00000003 /* MC_EMEM_ARB_TIMING_RC */
0x00000000 /* MC_EMEM_ARB_TIMING_RAS */
0x00000001 /* MC_EMEM_ARB_TIMING_FAW */
0x00000001 /* MC_EMEM_ARB_TIMING_RRD */
0x00000003 /* MC_EMEM_ARB_TIMING_RAP2PRE */Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.