arch/arm/boot/dts/nvidia/tegra30-asus-tf201.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nvidia/tegra30-asus-tf201.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nvidia/tegra30-asus-tf201.dts- Extension
.dts- Size
- 21923 bytes
- Lines
- 645
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
tegra30-asus-transformer-common.dtsitegra30-asus-lvds-display.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tegra30-asus-transformer-common.dtsi"
#include "tegra30-asus-lvds-display.dtsi"
/ {
model = "Asus Transformer Prime TF201";
compatible = "asus,tf201", "nvidia,tegra30";
pinmux@70000868 {
state_default: pinmux {
lcd_pwr2_pc6 {
nvidia,pins = "lcd_pwr2_pc6",
"lcd_dc1_pd2";
nvidia,function = "displaya";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pbb3 {
nvidia,pins = "pbb3";
nvidia,function = "vgp3";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
pbb7 {
nvidia,pins = "pbb7";
nvidia,function = "i2s4";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
kb_row7_pr7 {
nvidia,pins = "kb_row7_pr7";
nvidia,function = "kbc";
nvidia,pull = <TEGRA_PIN_PULL_UP>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
gmi_cs4_n_pk2 {
nvidia,pins = "gmi_cs4_n_pk2";
nvidia,function = "gmi";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_ENABLE>;
nvidia,enable-input = <TEGRA_PIN_ENABLE>;
};
};
};
serial@70006200 {
/* Azurewave AW-NH615 BCM4329B1 */
bluetooth {
compatible = "brcm,bcm4329-bt";
};
};
i2c@7000c400 {
/* Atmel MXT768E touchscreen */
touchscreen@4d {
compatible = "atmel,maxtouch";
reg = <0x4d>;
interrupt-parent = <&gpio>;
interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>;
Annotation
- Immediate include surface: `tegra30-asus-transformer-common.dtsi`, `tegra30-asus-lvds-display.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.