arch/arm/boot/dts/nvidia/tegra30-beaver.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nvidia/tegra30-beaver.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nvidia/tegra30-beaver.dts- Extension
.dts- Size
- 62626 bytes
- Lines
- 2141
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
tegra30.dtsitegra30-cpu-opp.dtsitegra30-cpu-opp-microvolt.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/dts-v1/;
#include "tegra30.dtsi"
#include "tegra30-cpu-opp.dtsi"
#include "tegra30-cpu-opp-microvolt.dtsi"
/ {
model = "NVIDIA Tegra30 Beaver evaluation board";
compatible = "nvidia,beaver", "nvidia,tegra30";
aliases {
rtc0 = "/i2c@7000d000/tps65911@2d";
rtc1 = "/rtc@7000e000";
serial0 = &uarta;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory@80000000 {
reg = <0x80000000 0x7ff00000>;
};
pcie@3000 {
status = "okay";
avdd-pexa-supply = <&ldo1_reg>;
vdd-pexa-supply = <&ldo1_reg>;
avdd-pexb-supply = <&ldo1_reg>;
vdd-pexb-supply = <&ldo1_reg>;
avdd-pex-pll-supply = <&ldo1_reg>;
avdd-plle-supply = <&ldo1_reg>;
vddio-pex-ctl-supply = <&sys_3v3_reg>;
hvdd-pex-supply = <&sys_3v3_pexs_reg>;
pci@1,0 {
status = "okay";
nvidia,num-lanes = <2>;
};
pci@2,0 {
nvidia,num-lanes = <2>;
};
pci@3,0 {
status = "okay";
nvidia,num-lanes = <2>;
};
};
host1x@50000000 {
hdmi@54280000 {
status = "okay";
hdmi-supply = <&vdd_5v0_hdmi>;
vdd-supply = <&sys_3v3_reg>;
pll-supply = <&vio_reg>;
nvidia,hpd-gpio =
<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
nvidia,ddc-i2c-bus = <&hdmiddc>;
};
};
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
Annotation
- Immediate include surface: `tegra30.dtsi`, `tegra30-cpu-opp.dtsi`, `tegra30-cpu-opp-microvolt.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.