arch/arm/boot/dts/nvidia/tegra30-colibri.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nvidia/tegra30-colibri.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nvidia/tegra30-colibri.dtsi- Extension
.dtsi- Size
- 28596 bytes
- Lines
- 1066
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
tegra30.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
#include "tegra30.dtsi"
/*
* Toradex Colibri T30 Module Device Tree
* Compatible for Revisions V1.1B, V1.1C, V1.1D, V1.1E, V1.1F; IT: V1.1A, V1.1B
*/
/ {
memory@80000000 {
reg = <0x80000000 0x40000000>;
};
host1x@50000000 {
hdmi@54280000 {
nvidia,ddc-i2c-bus = <&hdmi_ddc>;
nvidia,hpd-gpio =
<&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>;
pll-supply = <®_1v8_avdd_hdmi_pll>;
vdd-supply = <®_3v3_avdd_hdmi>;
};
};
gpio: gpio@6000d000 {
lan-reset-n-hog {
gpio-hog;
gpios = <TEGRA_GPIO(DD, 0) GPIO_ACTIVE_HIGH>;
output-high;
line-name = "LAN_RESET#";
};
};
pinmux@70000868 {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
state_default: pinmux {
/* Analogue Audio (On-module) */
clk1-out-pw4 {
nvidia,pins = "clk1_out_pw4";
nvidia,function = "extperiph1";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
nvidia,enable-input = <TEGRA_PIN_DISABLE>;
};
dap3-fs-pp0 {
nvidia,pins = "dap3_fs_pp0",
"dap3_sclk_pp3",
"dap3_din_pp1",
"dap3_dout_pp2";
nvidia,function = "i2s2";
nvidia,pull = <TEGRA_PIN_PULL_NONE>;
nvidia,tristate = <TEGRA_PIN_DISABLE>;
};
/* Colibri Address/Data Bus (GMI) */
gmi-ad0-pg0 {
nvidia,pins = "gmi_ad0_pg0",
"gmi_ad2_pg2",
"gmi_ad3_pg3",
"gmi_ad4_pg4",
"gmi_ad5_pg5",
"gmi_ad6_pg6",
"gmi_ad7_pg7",
"gmi_ad8_ph0",
"gmi_ad9_ph1",
"gmi_ad10_ph2",
"gmi_ad11_ph3",
"gmi_ad12_ph4",
"gmi_ad13_ph5",
"gmi_ad14_ph6",
Annotation
- Immediate include surface: `tegra30.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.