arch/arm/boot/dts/nvidia/tegra30.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nvidia/tegra30.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/nvidia/tegra30.dtsi
Extension
.dtsi
Size
38467 bytes
Lines
1372
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
#include <dt-bindings/clock/tegra30-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
#include <dt-bindings/memory/tegra30-mc.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/tegra-pmc.h>
#include <dt-bindings/thermal/thermal.h>

#include "tegra30-peripherals-opp.dtsi"

/ {
	compatible = "nvidia,tegra30";
	interrupt-parent = <&lic>;
	#address-cells = <1>;
	#size-cells = <1>;

	memory@80000000 {
		device_type = "memory";
		reg = <0x80000000 0x0>;
	};

	pcie@3000 {
		compatible = "nvidia,tegra30-pcie";
		device_type = "pci";
		reg = <0x00003000 0x00000800>, /* PADS registers */
		      <0x00003800 0x00000200>, /* AFI registers */
		      <0x10000000 0x10000000>; /* configuration space */
		reg-names = "pads", "afi", "cs";
		interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>, /* controller interrupt */
			     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; /* MSI interrupt */
		interrupt-names = "intr", "msi";

		#interrupt-cells = <1>;
		interrupt-map-mask = <0 0 0 0>;
		interrupt-map = <0 0 0 0 &intc GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;

		bus-range = <0x00 0xff>;
		#address-cells = <3>;
		#size-cells = <2>;

		ranges = <0x02000000 0 0x00000000 0x00000000 0 0x00001000>, /* port 0 configuration space */
			 <0x02000000 0 0x00001000 0x00001000 0 0x00001000>, /* port 1 configuration space */
			 <0x02000000 0 0x00004000 0x00004000 0 0x00001000>, /* port 2 configuration space */
			 <0x01000000 0 0          0x02000000 0 0x00010000>, /* downstream I/O */
			 <0x02000000 0 0x20000000 0x20000000 0 0x08000000>, /* non-prefetchable memory */
			 <0x42000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */

		clocks = <&tegra_car TEGRA30_CLK_PCIE>,
			 <&tegra_car TEGRA30_CLK_AFI>,
			 <&tegra_car TEGRA30_CLK_PLL_E>,
			 <&tegra_car TEGRA30_CLK_CML0>;
		clock-names = "pex", "afi", "pll_e", "cml";
		resets = <&tegra_car 70>,
			 <&tegra_car 72>,
			 <&tegra_car 74>;
		reset-names = "pex", "afi", "pcie_x";
		power-domains = <&pd_core>;
		operating-points-v2 = <&pcie_dvfs_opp_table>;
		status = "disabled";

		pci@1,0 {
			device_type = "pci";
			assigned-addresses = <0x82000800 0 0x00000000 0 0x1000>;
			reg = <0x000800 0 0 0 0>;
			bus-range = <0x00 0xff>;
			status = "disabled";

			#address-cells = <3>;
			#size-cells = <2>;

Annotation

Implementation Notes