arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx25-eukrea-mbimxsd25-baseboard-cmo-qvga.dts- Extension
.dts- Size
- 1287 bytes
- Lines
- 57
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx25-eukrea-mbimxsd25-baseboard.dts
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2013 Eukréa Electromatique <denis@eukrea.com>
*/
#include "imx25-eukrea-mbimxsd25-baseboard.dts"
/ {
model = "Eukrea MBIMXSD25 with the CMO-QVGA Display";
compatible = "eukrea,mbimxsd25-baseboard-cmo-qvga", "eukrea,mbimxsd25-baseboard", "eukrea,cpuimx25", "fsl,imx25";
cmo_qvga: display {
model = "CMO-QVGA";
bits-per-pixel = <16>;
fsl,pcr = <0xcad08b80>;
bus-width = <18>;
display-timings {
native-mode = <&qvga_timings>;
qvga_timings: timing0 {
clock-frequency = <6500000>;
hactive = <320>;
vactive = <240>;
hback-porch = <30>;
hfront-porch = <38>;
vback-porch = <20>;
vfront-porch = <3>;
hsync-len = <15>;
vsync-len = <4>;
};
};
};
reg_lcd_3v3: regulator-0 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_reg_lcd_3v3>;
regulator-name = "lcd-3v3";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio1 26 GPIO_ACTIVE_HIGH>;
enable-active-high;
};
};
&iomuxc {
pinctrl_reg_lcd_3v3: reg_lcd_3v3grp {
fsl,pins = <MX25_PAD_PWM__GPIO_1_26 0x80000000>;
};
};
&lcdc {
display = <&cmo_qvga>;
fsl,lpccr = <0x00a903ff>;
lcd-supply = <®_lcd_3v3>;
status = "okay";
};
Annotation
- Immediate include surface: `imx25-eukrea-mbimxsd25-baseboard.dts`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.