arch/arm/boot/dts/nxp/imx/imx27-apf27.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx27-apf27.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx27-apf27.dts- Extension
.dts- Size
- 2109 bytes
- Lines
- 111
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx27.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr>
* Copyright 2012 Armadeus Systems <support@armadeus.com>
*
* Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix
*/
/dts-v1/;
#include "imx27.dtsi"
/ {
model = "Armadeus Systems APF27 module";
compatible = "armadeus,imx27-apf27", "fsl,imx27";
memory@a0000000 {
device_type = "memory";
reg = <0xa0000000 0x04000000>;
};
};
&clk_osc26m {
clock-frequency = <0>;
};
&iomuxc {
pinctrl_fec1: fec1grp {
fsl,pins = <
MX27_PAD_SD3_CMD__FEC_TXD0 0x0
MX27_PAD_SD3_CLK__FEC_TXD1 0x0
MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
MX27_PAD_ATA_DATA6__FEC_MDIO 0x0
MX27_PAD_ATA_DATA7__FEC_MDC 0x0
MX27_PAD_ATA_DATA8__FEC_CRS 0x0
MX27_PAD_ATA_DATA9__FEC_TX_CLK 0x0
MX27_PAD_ATA_DATA10__FEC_RXD0 0x0
MX27_PAD_ATA_DATA11__FEC_RX_DV 0x0
MX27_PAD_ATA_DATA12__FEC_RX_CLK 0x0
MX27_PAD_ATA_DATA13__FEC_COL 0x0
MX27_PAD_ATA_DATA14__FEC_TX_ER 0x0
MX27_PAD_ATA_DATA15__FEC_TX_EN 0x0
>;
};
pinctrl_uart1: uart1grp {
fsl,pins = <
MX27_PAD_UART1_TXD__UART1_TXD 0x0
MX27_PAD_UART1_RXD__UART1_RXD 0x0
>;
};
};
&uart1 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
status = "okay";
};
&nfc {
Annotation
- Immediate include surface: `imx27.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.