arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx27-phytec-phycard-s-som.dtsi- Extension
.dtsi- Size
- 3933 bytes
- Lines
- 174
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx27.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
* Copyright 2012 Sascha Hauer, Uwe Kleine-König, Steffen Trumtrar
* and Markus Pargmann, Pengutronix
*/
/dts-v1/;
#include "imx27.dtsi"
/ {
model = "Phytec pca100";
compatible = "phytec,imx27-pca100", "fsl,imx27";
memory@a0000000 {
device_type = "memory";
reg = <0xa0000000 0x08000000>; /* 128MB */
};
usbotgphy: usbotgphy {
compatible = "usb-nop-xceiv";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbotgphy>;
reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
#phy-cells = <0>;
};
usbh2phy: usbh2phy {
compatible = "usb-nop-xceiv";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usbh2phy>;
reset-gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
#phy-cells = <0>;
};
};
&cspi1 {
cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>,
<&gpio4 27 GPIO_ACTIVE_LOW>;
status = "okay";
};
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fec1>;
status = "okay";
};
&i2c2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_i2c2>;
status = "okay";
eeprom@52 {
compatible = "atmel,24c32";
pagesize = <32>;
reg = <0x52>;
};
};
&iomuxc {
pinctrl_fec1: fec1grp {
fsl,pins = <
MX27_PAD_SD3_CMD__FEC_TXD0 0x0
MX27_PAD_SD3_CLK__FEC_TXD1 0x0
MX27_PAD_ATA_DATA0__FEC_TXD2 0x0
MX27_PAD_ATA_DATA1__FEC_TXD3 0x0
MX27_PAD_ATA_DATA2__FEC_RX_ER 0x0
MX27_PAD_ATA_DATA3__FEC_RXD1 0x0
MX27_PAD_ATA_DATA4__FEC_RXD2 0x0
MX27_PAD_ATA_DATA5__FEC_RXD3 0x0
Annotation
- Immediate include surface: `imx27.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.