arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx27-phytec-phycore-rdk.dts- Extension
.dts- Size
- 6203 bytes
- Lines
- 312
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx27-phytec-phycore-som.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later
/*
*/
#include "imx27-phytec-phycore-som.dtsi"
/ {
model = "Phytec pcm970";
compatible = "phytec,imx27-pcm970", "phytec,imx27-pcm038", "fsl,imx27";
chosen {
stdout-path = &uart1;
};
display0: LQ035Q7 {
model = "Sharp-LQ035Q7";
bits-per-pixel = <16>;
fsl,pcr = <0xf00080c0>;
display-timings {
native-mode = <&timing0>;
timing0: timing0 {
clock-frequency = <5500000>;
hactive = <240>;
vactive = <320>;
hback-porch = <5>;
hsync-len = <7>;
hfront-porch = <16>;
vback-porch = <7>;
vsync-len = <1>;
vfront-porch = <9>;
pixelclk-active = <1>;
hsync-active = <1>;
vsync-active = <1>;
de-active = <0>;
};
};
};
regulator-2 {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_csien>;
regulator-name = "CSI_EN";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 24 GPIO_ACTIVE_LOW>;
regulator-always-on;
};
usbphy2: usbphy {
compatible = "usb-nop-xceiv";
vcc-supply = <®_5v0>;
clocks = <&clks IMX27_CLK_DUMMY>;
clock-names = "main_clk";
#phy-cells = <0>;
};
};
&cspi1 {
pinctrl-0 = <&pinctrl_cspi1>, <&pinctrl_cspi1cs1>;
cs-gpios = <&gpio4 28 GPIO_ACTIVE_LOW>,
<&gpio4 27 GPIO_ACTIVE_LOW>;
};
&fb {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_imxfb1>;
display = <&display0>;
lcd-supply = <®_5v0>;
Annotation
- Immediate include surface: `imx27-phytec-phycore-som.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.