arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6dl-colibri-aster.dts- Extension
.dts- Size
- 1799 bytes
- Lines
- 115
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/input/input.hdt-bindings/interrupt-controller/irq.himx6dl.dtsiimx6qdl-colibri.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6dl.dtsi"
#include "imx6qdl-colibri.dtsi"
/ {
model = "Toradex Colibri iMX6DL/S on Colibri Aster Board";
compatible = "toradex,colibri_imx6dl-aster", "toradex,colibri_imx6dl",
"fsl,imx6dl";
aliases {
i2c0 = &i2c2;
i2c1 = &i2c3;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
/* Colibri SSP */
&ecspi4 {
cs-gpios = <
&gpio5 2 GPIO_ACTIVE_HIGH
&gpio5 4 GPIO_ACTIVE_HIGH
>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi4 &pinctrl_csi_gpio_2>;
status = "okay";
};
/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
&i2c3 {
status = "okay";
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <
&pinctrl_csi_gpio_1
&pinctrl_gpio_2
&pinctrl_gpio_aster
&pinctrl_usbh_oc_1
&pinctrl_usbc_id_1
&pinctrl_weim_gpio_5
>;
pinctrl_gpio_aster: gpioastergrp {
fsl,pins = <
MX6QDL_PAD_KEY_COL2__GPIO4_IO10 0x1b0b0
MX6QDL_PAD_KEY_ROW2__GPIO4_IO11 0x1b0b0
MX6QDL_PAD_KEY_ROW4__GPIO4_IO15 0x1b0b0
MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x1b0b0
MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x1b0b0
MX6QDL_PAD_NANDF_D6__GPIO2_IO06 0x1b0b0
MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x1b0b0
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
>;
};
};
&pwm1 {
status = "okay";
Annotation
- Immediate include surface: `dt-bindings/input/input.h`, `dt-bindings/interrupt-controller/irq.h`, `imx6dl.dtsi`, `imx6qdl-colibri.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.