arch/arm/boot/dts/nxp/imx/imx6dl-colibri-iris.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-iris.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6dl-colibri-iris.dts- Extension
.dts- Size
- 2567 bytes
- Lines
- 154
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/input/input.hdt-bindings/interrupt-controller/irq.himx6dl.dtsiimx6qdl-colibri.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/dts-v1/;
#include <dt-bindings/input/input.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include "imx6dl.dtsi"
#include "imx6qdl-colibri.dtsi"
/ {
model = "Toradex Colibri iMX6DL/S on Colibri Iris Board";
compatible = "toradex,colibri_imx6dl-iris", "toradex,colibri_imx6dl",
"fsl,imx6dl";
aliases {
i2c0 = &i2c2;
i2c1 = &i2c3;
};
aliases {
rtc0 = &rtc_i2c;
rtc1 = &snvs_rtc;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
/* Colibri SSP */
&ecspi4 {
status = "okay";
};
&gpio2 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_uart1_forceoff &pinctrl_uart23_forceoff>;
/*
* uart-a-on-x13-enable turns the UART transceiver for UART_A on. If one
* wants to turn the transceiver off, that property has to be deleted
* and the gpio handled in userspace.
* The same applies to uart-b-c-on-x14-enable where the UART_B and
* UART_C transceiver is turned on.
*/
uart-a-on-x13-enable-hog {
gpio-hog;
gpios = <4 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */
output-high;
};
uart-b-c-on-x14-enable-hog {
gpio-hog;
gpios = <8 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */
output-high;
};
};
/*
* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 (e.g. RTC on carrier board)
*/
&i2c3 {
status = "okay";
rtc_i2c: rtc@68 {
compatible = "st,m41t0";
reg = <0x68>;
Annotation
- Immediate include surface: `dt-bindings/input/input.h`, `dt-bindings/interrupt-controller/irq.h`, `imx6dl.dtsi`, `imx6qdl-colibri.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.