arch/arm/boot/dts/nxp/imx/imx6dl-colibri-iris-v2.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6dl-colibri-iris-v2.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6dl-colibri-iris-v2.dts- Extension
.dts- Size
- 1091 bytes
- Lines
- 47
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx6dl-colibri-iris.dts
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/dts-v1/;
#include "imx6dl-colibri-iris.dts"
/ {
model = "Toradex Colibri iMX6DL/S on Colibri Iris V2 Board";
compatible = "toradex,colibri_imx6dl-iris-v2", "toradex,colibri_imx6dl",
"fsl,imx6dl";
reg_3v3_vmmc: regulator-3v3-vmmc {
compatible = "regulator-fixed";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enable_3v3_vmmc>;
regulator-name = "3v3_vmmc";
regulator-min-microvolt = <3300000>;
regulator-max-microvolt = <3300000>;
gpio = <&gpio2 11 GPIO_ACTIVE_HIGH>;
startup-delay-us = <100>;
enable-active-high;
};
};
&iomuxc {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpio_iris &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1>;
pinctrl_enable_3v3_vmmc: enable3v3vmmcgrp {
fsl,pins = <
MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x1b0b0
>;
};
};
/* Colibri MMC */
&usdhc1 {
cap-power-off-card;
/* uncomment the following to enable SD card UHS mode if you have a V1.1 module */
/* /delete-property/ no-1-8-v; */
vmmc-supply = <®_3v3_vmmc>;
status = "okay";
};
Annotation
- Immediate include surface: `imx6dl-colibri-iris.dts`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.