arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6q-apalis-eval.dts- Extension
.dts- Size
- 1111 bytes
- Lines
- 60
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx6q-apalis-eval.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2014-2022 Toradex
* Copyright 2012 Freescale Semiconductor, Inc.
* Copyright 2011 Linaro Ltd.
*/
/dts-v1/;
#include "imx6q-apalis-eval.dtsi"
/ {
model = "Toradex Apalis iMX6Q/D Module on Apalis Evaluation Board";
compatible = "toradex,apalis_imx6q-eval", "toradex,apalis_imx6q",
"fsl,imx6q";
reg_pcie_switch: regulator-pcie-switch {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio1 2 GPIO_ACTIVE_HIGH>;
regulator-max-microvolt = <1800000>;
regulator-min-microvolt = <1800000>;
regulator-name = "pcie_switch";
startup-delay-us = <100000>;
status = "okay";
};
};
&can1 {
xceiver-supply = <®_3v3_sw>;
status = "okay";
};
&can2 {
xceiver-supply = <®_3v3_sw>;
status = "okay";
};
&pcie {
vpcie-supply = <®_pcie_switch>;
status = "okay";
};
&sound_spdif {
status = "okay";
};
/* MMC1 */
&usdhc1 {
status = "okay";
};
/* SD1 */
&usdhc2 {
cd-gpios = <&gpio6 14 GPIO_ACTIVE_LOW>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>;
status = "okay";
};
Annotation
- Immediate include surface: `imx6q-apalis-eval.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.