arch/arm/boot/dts/nxp/imx/imx6q-cubox-i-emmc-som-v15.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6q-cubox-i-emmc-som-v15.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6q-cubox-i-emmc-som-v15.dts- Extension
.dts- Size
- 2330 bytes
- Lines
- 61
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx6q.dtsiimx6qdl-sr-som.dtsiimx6qdl-sr-som-ti.dtsiimx6qdl-sr-som-emmc.dtsiimx6qdl-cubox-i.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
/dts-v1/;
#include "imx6q.dtsi"
#include "imx6qdl-sr-som.dtsi"
#include "imx6qdl-sr-som-ti.dtsi"
#include "imx6qdl-sr-som-emmc.dtsi"
#include "imx6qdl-cubox-i.dtsi"
/ {
model = "SolidRun Cubox-i Dual/Quad (1.5som+emmc)";
compatible = "solidrun,cubox-i/q", "fsl,imx6q";
};
&sata {
status = "okay";
fsl,transmit-level-mV = <1104>;
fsl,transmit-boost-mdB = <0>;
fsl,transmit-atten-16ths = <9>;
fsl,no-spread-spectrum;
};
Annotation
- Immediate include surface: `imx6q.dtsi`, `imx6qdl-sr-som.dtsi`, `imx6qdl-sr-som-ti.dtsi`, `imx6qdl-sr-som-emmc.dtsi`, `imx6qdl-cubox-i.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.