arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/nxp/imx/imx6q-logicpd.dts
Extension
.dts
Size
2764 bytes
Lines
131
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
//
// Copyright (C) 2019 Logic PD, Inc.

/dts-v1/;
#include "imx6q.dtsi"
#include "imx6-logicpd-som.dtsi"
#include "imx6-logicpd-baseboard.dtsi"

/ {
	model = "Logic PD i.MX6QD SOM-M3";
	compatible = "logicpd,imx6q-logicpd", "fsl,imx6q";

	backlight: backlight-lvds {
		compatible = "pwm-backlight";
		pwms = <&pwm3 0 20000 0>;
		brightness-levels = <0 4 8 16 32 64 128 255>;
		default-brightness-level = <6>;
		power-supply = <&reg_lcd>;
	};

	panel-lvds0 {
		compatible = "okaya,rs800480t-7x0gp";
		power-supply = <&reg_lcd_reset>;
		backlight = <&backlight>;

		port {
			panel_in_lvds0: endpoint {
				remote-endpoint = <&lvds0_out>;
			};
		};
	};

	reg_lcd: regulator-lcd {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lcd_reg>;
		compatible = "regulator-fixed";
		regulator-name = "lcd_panel_pwr";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio4 17 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&reg_3v3>;
		startup-delay-us = <500000>;
	};

	reg_lcd_reset: regulator-lcd-reset {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_lcd_reset>;
		compatible = "regulator-fixed";
		regulator-name = "nLCD_RESET";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		gpio = <&gpio5 2 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		vin-supply = <&reg_lcd>;
	};
};

&clks {
	assigned-clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>,
			  <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
			  <&clks IMX6QDL_CLK_IPU1_DI0_PRE_SEL>,
			  <&clks IMX6QDL_CLK_IPU2_DI0_PRE_SEL>;
	assigned-clock-parents = <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
				 <&clks IMX6QDL_CLK_PLL5_VIDEO_DIV>,
				 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>,
				 <&clks IMX6QDL_CLK_PLL2_PFD2_396M>;
};

Annotation

Implementation Notes