arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6q-lxr.dts- Extension
.dts- Size
- 1562 bytes
- Lines
- 88
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx6q-phytec-pfla02.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
//
// Copyright 2024 Comvetia AG
/dts-v1/;
#include "imx6q-phytec-pfla02.dtsi"
/ {
model = "COMVETIA QSoIP LXR-2";
compatible = "comvetia,imx6q-lxr", "phytec,imx6q-pfla02", "fsl,imx6q";
chosen {
stdout-path = &uart4;
};
spi {
compatible = "spi-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_spi_gpio>;
sck-gpios = <&gpio5 8 GPIO_ACTIVE_HIGH>;
mosi-gpios = <&gpio5 7 GPIO_ACTIVE_HIGH>;
num-chipselects = <0>;
#address-cells = <1>;
#size-cells = <0>;
fpga@0 {
compatible = "altr,fpga-passive-serial";
reg = <0>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_fpga>;
nconfig-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>;
nstat-gpios = <&gpio4 19 GPIO_ACTIVE_LOW>;
confd-gpios = <&gpio1 6 GPIO_ACTIVE_HIGH>;
};
};
};
&ecspi3 {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ecspi3>;
cs-gpios = <&gpio4 24 GPIO_ACTIVE_LOW>;
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <20000000>;
};
};
&fec {
status = "okay";
};
&i2c3 {
status = "okay";
};
&uart3 {
status = "okay";
};
&uart4 {
status = "okay";
};
&usdhc3 {
no-1-8-v;
status = "okay";
};
Annotation
- Immediate include surface: `imx6q-phytec-pfla02.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.