arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/nxp/imx/imx6qdl-phytec-mira-peb-eval-01.dtsi
Extension
.dtsi
Size
1428 bytes
Lines
72
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2018 PHYTEC Messtechnik
 * Author: Christian Hemp <c.hemp@phytec.de>
 */

#include <dt-bindings/input/input.h>

/ {
	gpio-keys {
		compatible = "gpio-keys";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_keys>;
		status = "disabled";

		key-power {
			label = "Power Button";
			gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WAKEUP>;
			wakeup-source;
		};

		key-sleep {
			label = "Sleep Button";
			gpios = <&gpio6 18 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_SLEEP>;
		};
	};

	user_leds: user-leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_user_leds>;
		status = "disabled";

		user-led1 {
			gpios = <&gpio7 1 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "none";
			default-state = "on";
		};

		user-led2 {
			gpios = <&gpio7 0 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "none";
			default-state = "on";
		};

		user-led3 {
			gpios = <&gpio5 29 GPIO_ACTIVE_HIGH>;
			linux,default-trigger = "none";
			default-state = "on";
		};
	};
};

&iomuxc {
	pinctrl_gpio_keys: gpiokeysgrp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT6__GPIO6_IO18		0x1b0b0
			MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28	0x1b0b0
		>;
	};

	pinctrl_user_leds: userledsgrp {
		fsl,pins = <
			MX6QDL_PAD_SD3_DAT4__GPIO7_IO01		0x1b0b0
			MX6QDL_PAD_SD3_DAT5__GPIO7_IO00		0x1b0b0
			MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29	0x1b0b0
		>;
	};

Annotation

Implementation Notes