arch/arm/boot/dts/nxp/imx/imx6qdl-pico-dwarf.dtsi

File Facts

System

Linux kernel

Corpus path

arch/arm/boot/dts/nxp/imx/imx6qdl-pico-dwarf.dtsi

Extension

.dtsi

Size

631 bytes

Lines

46

Domain

Architecture Layer

Bucket

arch/arm

Inferred role

Architecture Layer: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• imx6qdl-pico.dtsi

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2017 NXP

#include "imx6qdl-pico.dtsi"

/ {
	leds {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led {
			label = "gpio-led";
			gpios = <&gpio5 31 GPIO_ACTIVE_HIGH>;
		};
	};

};

&i2c1 {
	mpl3115@60 {
		compatible = "fsl,mpl3115";
		reg = <0x60>;
	};
};

&i2c2 {
	io-expander@25 {
		compatible = "nxp,pca9554";
		reg = <0x25>;
		gpio-controller;
		#gpio-cells = <2>;
		#interrupt-cells = <2>;
	};

};

&iomuxc {
	pinctrl_gpio_leds: gpioledsgrp {
		fsl,pins = <
			MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31	0x1b0b0
		>;
	};
};

Annotation

• Immediate include surface: `imx6qdl-pico.dtsi`.
• Atlas domain: Architecture Layer / arch/arm.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.