arch/arm/boot/dts/nxp/imx/imx6qdl-skov-revc-lt2.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6qdl-skov-revc-lt2.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6qdl-skov-revc-lt2.dtsi- Extension
.dtsi- Size
- 2632 bytes
- Lines
- 100
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright (C) 2021 Pengutronix, Oleksij Rempel <kernel@pengutronix.de>
/ {
backlight: backlight {
compatible = "pwm-backlight";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_backlight>;
enable-gpios = <&gpio6 23 GPIO_ACTIVE_LOW>;
pwms = <&pwm2 0 20000 0>;
brightness-levels = <0 255>;
num-interpolated-steps = <17>;
default-brightness-level = <8>;
power-supply = <®_24v0>;
};
display {
#address-cells = <1>;
#size-cells = <0>;
compatible = "fsl,imx-parallel-display";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_ipu1>;
port@0 {
reg = <0>;
display0_in: endpoint {
remote-endpoint = <&ipu1_di0_disp0>;
};
};
port@1 {
reg = <1>;
display0_out: endpoint {
remote-endpoint = <&panel_in>;
};
};
};
panel {
compatible = "logictechno,lttd800480070-l2rt";
backlight = <&backlight>;
power-supply = <®_3v3>;
port {
panel_in: endpoint {
remote-endpoint = <&display0_out>;
};
};
};
};
&ipu1_di0_disp0 {
remote-endpoint = <&display0_in>;
};
&iomuxc {
pinctrl_backlight: backlightgrp {
fsl,pins = <
MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 0x58
>;
};
pinctrl_ipu1: ipu1grp {
fsl,pins = <
MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.