arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6qdl-sr-som-ti.dtsi- Extension
.dtsi- Size
- 5252 bytes
- Lines
- 176
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
#include <dt-bindings/gpio/gpio.h>
/ {
clk32k: clock-32k {
compatible = "fixed-clock";
clock-frequency = <32768>;
#clock-cells = <0>;
};
nvcc_sd1: regulator-nvcc-sd1 {
compatible = "regulator-fixed";
regulator-always-on;
regulator-name = "nvcc_sd1";
regulator-min-microvolt = <1800000>;
regulator-max-microvolt = <1800000>;
vin-supply = <&vcc_3v3>;
};
clk_ti_wifi: ti-wifi-clock {
/* This is a hack around the kernel - using "fixed clock"
* results in the "pinctrl" properties being ignored, and
* the clock not being output. Instead, use a gated clock
* and the unrouted WL_XTAL_PU gpio.
*/
compatible = "gpio-gate-clock";
#clock-cells = <0>;
clocks = <&clk32k>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_ti_clk>;
enable-gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
};
pwrseq_ti_wifi: ti-wifi-pwrseq {
compatible = "mmc-pwrseq-simple";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_microsom_ti_wifi_en>;
reset-gpios = <&gpio5 26 GPIO_ACTIVE_LOW>;
post-power-on-delay-ms = <200>;
clocks = <&clk_ti_wifi>;
clock-names = "ext_clock";
};
};
&iomuxc {
pinctrl_microsom_ti_bt: microsom-ti-btgrp {
fsl,pins = <
/* BT_EN_SOC */
MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x40013070
>;
};
pinctrl_microsom_ti_clk: microsom-ti-clkgrp {
fsl,pins = <
/* EXT_32K */
MX6QDL_PAD_GPIO_8__XTALOSC_REF_CLK_32K 0x1b0b0
/* WL_XTAL_PU (unrouted) */
MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x40013070
>;
};
pinctrl_microsom_ti_wifi_en: microsom-ti-wifi-engrp {
fsl,pins = <
/* WLAN_EN_SOC */
MX6QDL_PAD_CSI0_DAT8__GPIO5_IO26 0x40013070
>;
};
pinctrl_microsom_ti_wifi_irq: microsom-ti-wifi-irqgrp {
fsl,pins = <
/* WLAN_IRQ */
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.