arch/arm/boot/dts/nxp/imx/imx6qp.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6qp.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/nxp/imx/imx6qp.dtsi
Extension
.dtsi
Size
2863 bytes
Lines
121
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2016 Freescale Semiconductor, Inc.

#include "imx6q.dtsi"

/ {
	soc {
		ocram2: sram@940000 {
			compatible = "mmio-sram";
			reg = <0x00940000 0x20000>;
			ranges = <0 0x00940000 0x20000>;
			#address-cells = <1>;
			#size-cells = <1>;
			clocks = <&clks IMX6QDL_CLK_OCRAM>;
		};

		ocram3: sram@960000 {
			compatible = "mmio-sram";
			reg = <0x00960000 0x20000>;
			ranges = <0 0x00960000 0x20000>;
			#address-cells = <1>;
			#size-cells = <1>;
			clocks = <&clks IMX6QDL_CLK_OCRAM>;
		};

		bus@2100000 {
			pre1: pre@21c8000 {
				compatible = "fsl,imx6qp-pre";
				reg = <0x021c8000 0x1000>;
				interrupts = <GIC_SPI 90 IRQ_TYPE_EDGE_RISING>;
				clocks = <&clks IMX6QDL_CLK_PRE0>;
				clock-names = "axi";
				fsl,iram = <&ocram2>;
			};

			pre2: pre@21c9000 {
				compatible = "fsl,imx6qp-pre";
				reg = <0x021c9000 0x1000>;
				interrupts = <GIC_SPI 97 IRQ_TYPE_EDGE_RISING>;
				clocks = <&clks IMX6QDL_CLK_PRE1>;
				clock-names = "axi";
				fsl,iram = <&ocram2>;
			};

			pre3: pre@21ca000 {
				compatible = "fsl,imx6qp-pre";
				reg = <0x021ca000 0x1000>;
				interrupts = <GIC_SPI 98 IRQ_TYPE_EDGE_RISING>;
				clocks = <&clks IMX6QDL_CLK_PRE2>;
				clock-names = "axi";
				fsl,iram = <&ocram3>;
			};

			pre4: pre@21cb000 {
				compatible = "fsl,imx6qp-pre";
				reg = <0x021cb000 0x1000>;
				interrupts = <GIC_SPI 99 IRQ_TYPE_EDGE_RISING>;
				clocks = <&clks IMX6QDL_CLK_PRE3>;
				clock-names = "axi";
				fsl,iram = <&ocram3>;
			};

			prg1: prg@21cc000 {
				compatible = "fsl,imx6qp-prg";
				reg = <0x021cc000 0x1000>;
				clocks = <&clks IMX6QDL_CLK_PRG0_APB>,
					 <&clks IMX6QDL_CLK_PRG0_AXI>;
				clock-names = "ipg", "axi";
				fsl,pres = <&pre1>, <&pre2>, <&pre3>;

Annotation

Implementation Notes