arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6qp-prtwd3.dts- Extension
.dts- Size
- 12037 bytes
- Lines
- 558
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/gpio/gpio.himx6qp.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright (c) 2018 Protonic Holland
* Copyright (c) 2020 Oleksij Rempel <kernel@pengutronix.de>, Pengutronix
*/
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include "imx6qp.dtsi"
/ {
model = "Protonic WD3 board";
compatible = "prt,prtwd3", "fsl,imx6qp";
chosen {
stdout-path = &uart4;
};
memory@10000000 {
device_type = "memory";
reg = <0x10000000 0x20000000>;
};
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x20000000>;
};
clock_ksz8081: clock-ksz8081 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <50000000>;
};
clock_ksz9031: clock-ksz9031 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
clock_mcp251xfd: clock-mcp251xfd {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <20000000>;
};
clock_sja1105: clock-sja1105 {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
mdio {
compatible = "virtual,mdio-gpio";
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_mdio>;
#address-cells = <1>;
#size-cells = <0>;
gpios = <&gpio5 6 GPIO_ACTIVE_HIGH
&gpio5 7 GPIO_ACTIVE_HIGH>;
/* Microchip KSZ8081 */
usbeth_phy: ethernet-phy@3 {
reg = <0x3>;
interrupts-extended = <&gpio5 12 IRQ_TYPE_LEVEL_LOW>;
reset-gpios = <&gpio5 11 GPIO_ACTIVE_LOW>;
reset-assert-us = <500>;
reset-deassert-us = <1000>;
Annotation
- Immediate include surface: `dt-bindings/gpio/gpio.h`, `imx6qp.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.