arch/arm/boot/dts/nxp/imx/imx6sx-udoo-neo-full.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6sx-udoo-neo-full.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6sx-udoo-neo-full.dts- Extension
.dts- Size
- 610 bytes
- Lines
- 42
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx6sx-udoo-neo.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2016 Andreas Färber
*/
/dts-v1/;
#include "imx6sx-udoo-neo.dtsi"
/ {
model = "UDOO Neo Full";
compatible = "udoo,neofull", "fsl,imx6sx";
memory@80000000 {
device_type = "memory";
reg = <0x80000000 0x40000000>;
};
};
&fec1 {
phy-handle = <ðphy1>;
status = "okay";
mdio {
#address-cells = <1>;
#size-cells = <0>;
ethphy1: ethernet-phy@0 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <0>;
};
};
};
&i2c4 { /* Onboard Motion sensors */
status = "okay";
};
&uart3 { /* Bluetooth */
status = "okay";
};
Annotation
- Immediate include surface: `imx6sx-udoo-neo.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.