arch/arm/boot/dts/nxp/imx/imx6ul-opos6uldev.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6ul-opos6uldev.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx6ul-opos6uldev.dts- Extension
.dts- Size
- 1058 bytes
- Lines
- 42
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
imx6ul-opos6ul.dtsiimx6ul-imx6ull-opos6uldev.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0 OR MIT
//
// Copyright 2017 Armadeus Systems <support@armadeus.com>
/dts-v1/;
#include "imx6ul-opos6ul.dtsi"
#include "imx6ul-imx6ull-opos6uldev.dtsi"
/ {
model = "Armadeus Systems OPOS6UL SoM (i.MX6UL) on OPOS6ULDev board";
compatible = "armadeus,imx6ul-opos6uldev", "armadeus,imx6ul-opos6ul", "fsl,imx6ul";
};
&iomuxc {
pinctrl-0 = <&pinctrl_gpios>, <&pinctrl_tamper_gpios>;
pinctrl_tamper_gpios: tampergpiosgrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER0__GPIO5_IO00 0x0b0b0
MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x0b0b0
MX6UL_PAD_SNVS_TAMPER3__GPIO5_IO03 0x0b0b0
MX6UL_PAD_SNVS_TAMPER4__GPIO5_IO04 0x0b0b0
MX6UL_PAD_SNVS_TAMPER5__GPIO5_IO05 0x0b0b0
MX6UL_PAD_SNVS_TAMPER6__GPIO5_IO06 0x0b0b0
MX6UL_PAD_SNVS_TAMPER7__GPIO5_IO07 0x0b0b0
MX6UL_PAD_SNVS_TAMPER8__GPIO5_IO08 0x0b0b0
>;
};
pinctrl_usbotg2_vbus: usbotg2vbusgrp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09 0x1b0b0
>;
};
pinctrl_w1: w1grp {
fsl,pins = <
MX6UL_PAD_SNVS_TAMPER1__GPIO5_IO01 0x0b0b0
>;
};
};
Annotation
- Immediate include surface: `imx6ul-opos6ul.dtsi`, `imx6ul-imx6ull-opos6uldev.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.