arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-wlbt-05.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-wlbt-05.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/nxp/imx/imx6ul-phytec-segin-peb-wlbt-05.dtsi
Extension
.dtsi
Size
2151 bytes
Lines
91
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (C) 2021 PHYTEC Messtechnik GmbH
 * Author: Yunus Bas <y.bas@phytec.de>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

/ {
	reg_wl_en: regulator-wl-en {
		compatible = "regulator-fixed";
		regulator-name = "wlan_en";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_wl>;
		gpio = <&gpio5 9 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		startup-delay-us = <100>;
		status = "disabled";
	};
};

&iomuxc {
	pinctrl_bt: btgrp {
		fsl,pins = <
			MX6UL_PAD_GPIO1_IO01__GPIO1_IO01	0x3031	/* BT ENABLE */
			MX6UL_PAD_GPIO1_IO03__GPIO1_IO03	0x3031	/* HOST WAKEUP */
			MX6UL_PAD_JTAG_MOD__GPIO1_IO10		0x3031	/* DEV WAKEUP */
		>;
	};

	pinctrl_uart2_bt: uart2-bt-grp {
		fsl,pins = <
			MX6UL_PAD_UART2_TX_DATA__UART2_DCE_TX   0x17059
			MX6UL_PAD_UART2_RX_DATA__UART2_DCE_RX   0x17059
			MX6UL_PAD_UART2_CTS_B__UART2_DCE_CTS    0x17059
			MX6UL_PAD_UART2_RTS_B__UART2_DCE_RTS    0x17059
		>;
	};

	pinctrl_usdhc2_wl: usdhc2-wl-grp {
		fsl,pins = <
			MX6UL_PAD_LCD_DATA18__USDHC2_CMD    0x10051
			MX6UL_PAD_LCD_DATA19__USDHC2_CLK    0x10061
			MX6UL_PAD_LCD_DATA20__USDHC2_DATA0  0x10051
			MX6UL_PAD_LCD_DATA21__USDHC2_DATA1  0x10051
			MX6UL_PAD_LCD_DATA22__USDHC2_DATA2  0x10051
			MX6UL_PAD_LCD_DATA23__USDHC2_DATA3  0x10051
		>;
	};

	pinctrl_wl: wlgrp {
		fsl,pins = <
			MX6UL_PAD_SNVS_TAMPER9__GPIO5_IO09  0x3031	/* WLAN ENABLE */
		>;
	};
};

&uart2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart2_bt &pinctrl_bt>;
	uart-has-rtscts;
	status = "disabled";

	bluetooth {
		compatible = "brcm,bcm43438-bt";
		shutdown-gpios = <&gpio1 1 GPIO_ACTIVE_HIGH>;
		device-wakeup-gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;

Annotation

Implementation Notes