arch/arm/boot/dts/nxp/imx/imx6ull-var-som.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx6ull-var-som.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/nxp/imx/imx6ull-var-som.dtsi
Extension
.dtsi
Size
818 bytes
Lines
37
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+
/*
 * Support for Variscite VAR-SOM-6UL module with imx6ull CPU
 *
 * Copyright 2019-2024 Variscite Ltd.
 * Copyright 2026 Dimonoff
 */

#include "imx6ull.dtsi"
#include "imx6ul-var-som-common.dtsi"

/ {
	model = "Variscite VAR-SOM-6UL module";
	compatible = "variscite,var-som-imx6ull", "fsl,imx6ull";
};

&iomuxc {
	pinctrl_brcm_bt: brcm-bt-grp {
		fsl,pins = <
			MX6ULL_PAD_SNVS_TAMPER4__GPIO5_IO04	0x1b0b0	/* BT_REG_ON (BT_EN) */
		>;
	};

	pinctrl_brcm_wifi: brcm-wifi-grp {
		fsl,pins = <
			MX6ULL_PAD_SNVS_TAMPER2__GPIO5_IO02	0x1b0b0	/* WL_PWR (WIFI_PWR 5G) */
			MX6ULL_PAD_SNVS_TAMPER6__GPIO5_IO06	0x1b0b0	/* WL_REG_ON (WIFI_EN) */
		>;
	};

	pinctrl_enet1_gpio: enet1-gpiogrp {
		fsl,pins = <
			MX6ULL_PAD_SNVS_TAMPER0__GPIO5_IO00	0x1b0b0 /* fec1 reset */
		>;
	};
};

Annotation

Implementation Notes