arch/arm/boot/dts/nxp/imx/imx7-colibri-iris.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx7-colibri-iris.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx7-colibri-iris.dtsi- Extension
.dtsi- Size
- 1934 bytes
- Lines
- 110
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/*
* Copyright 2022 Toradex
*/
/* Colibri AD0 to AD3 */
&adc1 {
status = "okay";
};
/*
* The Atmel maxtouch controller uses SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm2, pwm3.
* So if you enable following capacitive touch controller, disable pwm2/pwm3 first.
*/
&atmel_mxt_ts {
interrupt-parent = <&gpio1>;
interrupts = <9 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 / INT */
pinctrl-0 = <&pinctrl_atmel_adapter>;
reset-gpios = <&gpio1 10 GPIO_ACTIVE_LOW>; /* SODIMM 30 / RST */
};
/* Colibri SSP */
&ecspi3 {
status = "okay";
};
/* Colibri Fast Ethernet */
&fec1 {
status = "okay";
};
&gpio2 {
/*
* uart25 turns the UART transceiver for UART2 and 5 on. If one wants to turn the
* transceiver off, that property has to be deleted and the gpio handled in userspace.
* The same applies to uart1_tx_on where the UART1 transceiver is turned on.
*/
uart25-tx-on-hog {
gpio-hog;
gpios = <27 GPIO_ACTIVE_HIGH>; /* SODIMM 104 */
output-high;
};
};
&gpio5 {
uart1-tx-on-hog {
gpio-hog;
gpios = <17 GPIO_ACTIVE_HIGH>; /* SODIMM 102 */
output-high;
};
};
/* Colibri I2C: I2C3_SDA/SCL on SODIMM 194/196 */
&i2c4 {
status = "okay";
};
/* Colibri PWM<A> */
&pwm1 {
status = "okay";
};
/* Colibri PWM<B> */
&pwm2 {
/* The pwm2 should be disabled to enable atmel_mxt_ts touchscreen for adapter. */
status = "okay";
};
/* Colibri PWM<C> */
&pwm3 {
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.