arch/arm/boot/dts/nxp/imx/imx7d.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx7d.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx7d.dtsi- Extension
.dtsi- Size
- 6317 bytes
- Lines
- 238
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- Touches IRQ or DMA behavior; this matters for the representative real-device path.
Dependency Surface
imx7s.dtsidt-bindings/reset/imx7-reset.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright 2015 Freescale Semiconductor, Inc.
// Copyright 2016 Toradex AG
#include "imx7s.dtsi"
#include <dt-bindings/reset/imx7-reset.h>
/ {
aliases {
usb0 = &usbotg1;
usb1 = &usbotg2;
usb2 = &usbh;
};
cpus {
cpu0: cpu@0 {
clock-frequency = <996000000>;
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
nvmem-cells = <&fuse_grade>;
nvmem-cell-names = "speed_grade";
};
cpu1: cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <1>;
clock-frequency = <996000000>;
operating-points-v2 = <&cpu0_opp_table>;
#cooling-cells = <2>;
cpu-idle-states = <&cpu_sleep_wait>;
};
};
timer {
compatible = "arm,armv7-timer";
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
};
cpu0_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-792000000 {
opp-hz = /bits/ 64 <792000000>;
opp-microvolt = <1000000 950000 1250000>;
clock-latency-ns = <150000>;
opp-supported-hw = <0xd>, <0x7>;
opp-suspend;
};
opp-996000000 {
opp-hz = /bits/ 64 <996000000>;
opp-microvolt = <1100000 1045000 1250000>;
clock-latency-ns = <150000>;
opp-supported-hw = <0xc>, <0x7>;
opp-suspend;
};
opp-1200000000 {
opp-hz = /bits/ 64 <1200000000>;
opp-microvolt = <1225000 1200000 1250000>;
clock-latency-ns = <150000>;
opp-supported-hw = <0x8>, <0x3>;
opp-suspend;
Annotation
- Immediate include surface: `imx7s.dtsi`, `dt-bindings/reset/imx7-reset.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
- IRQ or DMA behavior appears here, which is relevant to the selected PCIe/NVMe device path.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.