arch/arm/boot/dts/nxp/imx/imx7d-sdb-sht11.dts

File Facts

System

Linux kernel

Corpus path

arch/arm/boot/dts/nxp/imx/imx7d-sdb-sht11.dts

Extension

.dts

Size

699 bytes

Lines

37

Domain

Architecture Layer

Bucket

arch/arm

Inferred role

Architecture Layer: configuration, schema, or hardware description

Status

atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

• CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

• imx7d-sdb.dts

Detected Declarations

• No top-level syscall, struct, function, initcall, or export declaration detected by the generator.

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0+ OR MIT
//
// Copyright (C) 2015 Freescale Semiconductor, Inc.

#include "imx7d-sdb.dts"

/ {
	sensor {
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_sensor>;
		compatible = "sensirion,sht15";
		clk-gpios = <&gpio4 12 0>;
		data-gpios = <&gpio4 13 0>;
		vcc-supply = <&reg_sht15>;
	};

	reg_sht15: regulator-sht15 {
		compatible = "regulator-fixed";
		regulator-name = "reg_sht15";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};
};

&i2c3 {
	status = "disabled";
};

&iomuxc {
	pinctrl_sensor: sensorgrp {
		fsl,pins = <
			MX7D_PAD_I2C3_SDA__GPIO4_IO13	0x4000007f
			MX7D_PAD_I2C3_SCL__GPIO4_IO12	0x4000007f
		>;
	};
};

Annotation

• Immediate include surface: `imx7d-sdb.dts`.
• Atlas domain: Architecture Layer / arch/arm.
• Implementation status: atlas-only.

Implementation Notes

• This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
• Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
• Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.