arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/imx/imx7ulp.dtsi- Extension
.dtsi- Size
- 14103 bytes
- Lines
- 512
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/imx7ulp-clock.hdt-bindings/gpio/gpio.hdt-bindings/interrupt-controller/arm-gic.himx7ulp-pinfunc.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
* Copyright 2017-2018 NXP
* Dong Aisheng <aisheng.dong@nxp.com>
*/
#include <dt-bindings/clock/imx7ulp-clock.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "imx7ulp-pinfunc.h"
/ {
interrupt-parent = <&intc>;
#address-cells = <1>;
#size-cells = <1>;
aliases {
gpio0 = &gpio_ptc;
gpio1 = &gpio_ptd;
gpio2 = &gpio_pte;
gpio3 = &gpio_ptf;
i2c0 = &lpi2c6;
i2c1 = &lpi2c7;
mmc0 = &usdhc0;
mmc1 = &usdhc1;
serial0 = &lpuart4;
serial1 = &lpuart5;
serial2 = &lpuart6;
serial3 = &lpuart7;
usbphy0 = &usbphy1;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@f00 {
compatible = "arm,cortex-a7";
device_type = "cpu";
reg = <0xf00>;
clocks = <&smc1 IMX7ULP_CLK_ARM>,
<&scg1 IMX7ULP_CLK_CORE>,
<&scg1 IMX7ULP_CLK_SYS_SEL>,
<&scg1 IMX7ULP_CLK_HSRUN_CORE>,
<&scg1 IMX7ULP_CLK_HSRUN_SYS_SEL>,
<&scg1 IMX7ULP_CLK_FIRC>;
clock-names = "arm", "core", "scs_sel",
"hsrun_core", "hsrun_scs_sel",
"firc";
operating-points-v2 = <&cpu0_opp_table>;
};
};
cpu0_opp_table: opp-table {
compatible = "operating-points-v2";
opp-shared;
opp-500210000 {
opp-hz = /bits/ 64 <500210000>;
opp-microvolt = <1025000>;
clock-latency-ns = <150000>;
opp-suspend;
};
opp-720000000 {
opp-hz = /bits/ 64 <720000000>;
opp-microvolt = <1125000>;
Annotation
- Immediate include surface: `dt-bindings/clock/imx7ulp-clock.h`, `dt-bindings/gpio/gpio.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `imx7ulp-pinfunc.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.