arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/lpc/lpc4337-ciaa.dts- Extension
.dts- Size
- 3667 bytes
- Lines
- 222
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
lpc18xx.dtsilpc4357.dtsidt-bindings/gpio/gpio.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
/dts-v1/;
#include "lpc18xx.dtsi"
#include "lpc4357.dtsi"
#include "dt-bindings/gpio/gpio.h"
/ {
model = "CIAA NXP LPC4337";
compatible = "ciaa,lpc4337", "nxp,lpc4337", "nxp,lpc4350";
aliases {
serial0 = &uart2;
serial1 = &uart3;
};
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
stdout-path = &uart2;
};
memory@28000000 {
device_type = "memory";
reg = <0x28000000 0x0800000>; /* 8 MB */
};
};
&pinctrl {
enet_rmii_pins: enet-rmii-pins {
enet_rmii_rxd_cfg {
pins = "p1_15", "p0_0";
function = "enet";
slew-rate = <1>;
bias-disable;
input-enable;
input-schmitt-disable;
};
enet_rmii_txd_cfg {
pins = "p1_18", "p1_20";
function = "enet";
slew-rate = <1>;
bias-disable;
input-enable;
input-schmitt-disable;
};
enet_rmii_rx_dv_cfg {
pins = "p1_16";
function = "enet";
bias-disable;
input-enable;
input-schmitt-disable;
};
enet_rmii_tx_en_cfg {
pins = "p0_1";
function = "enet";
bias-disable;
input-enable;
input-schmitt-disable;
};
enet_ref_clk_cfg {
pins = "p1_19";
function = "enet";
slew-rate = <1>;
bias-disable;
input-enable;
input-schmitt-disable;
Annotation
- Immediate include surface: `lpc18xx.dtsi`, `lpc4357.dtsi`, `dt-bindings/gpio/gpio.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.