arch/arm/boot/dts/nxp/vf/vf500.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/nxp/vf/vf500.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/nxp/vf/vf500.dtsi- Extension
.dtsi- Size
- 1151 bytes
- Lines
- 63
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
vfxxx.dtsidt-bindings/interrupt-controller/arm-gic.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0 OR MIT)
//
// Copyright 2013 Freescale Semiconductor, Inc.
#include "vfxxx.dtsi"
#include <dt-bindings/interrupt-controller/arm-gic.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
chosen { };
aliases { };
cpus {
#address-cells = <1>;
#size-cells = <0>;
a5_cpu: cpu@0 {
compatible = "arm,cortex-a5";
device_type = "cpu";
reg = <0x0>;
};
};
soc {
bus@40000000 {
intc: interrupt-controller@40003000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
interrupt-parent = <&intc>;
reg = <0x40003000 0x1000>,
<0x40002100 0x100>;
};
global_timer: timer@40002200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x40002200 0x20>;
interrupts = <GIC_PPI 11 IRQ_TYPE_EDGE_RISING>;
interrupt-parent = <&intc>;
clocks = <&clks VF610_CLK_PLATFORM_BUS>;
};
};
};
pmu {
compatible = "arm,cortex-a5-pmu";
interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
interrupt-affinity = <&a5_cpu>;
interrupt-parent = <&mscm_ir>;
};
};
&mscm_ir {
interrupt-parent = <&intc>;
};
&wdoga5 {
status = "okay";
};
Annotation
- Immediate include surface: `vfxxx.dtsi`, `dt-bindings/interrupt-controller/arm-gic.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.