arch/arm/boot/dts/qcom/pmx55.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/qcom/pmx55.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/qcom/pmx55.dtsi- Extension
.dtsi- Size
- 1783 bytes
- Lines
- 86
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/iio/qcom,spmi-vadc.hdt-bindings/interrupt-controller/irq.hdt-bindings/spmi/spmi.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: BSD-3-Clause
/*
* Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
* Copyright (c) 2020, Linaro Limited
*/
#include <dt-bindings/iio/qcom,spmi-vadc.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/spmi/spmi.h>
&spmi_bus {
pmic@8 {
compatible = "qcom,pmx55", "qcom,spmi-pmic";
reg = <0x8 SPMI_USID>;
#address-cells = <1>;
#size-cells = <0>;
pon@800 {
compatible = "qcom,pm8916-pon";
reg = <0x0800>;
status = "disabled";
};
pmx55_temp: temp-alarm@2400 {
compatible = "qcom,spmi-temp-alarm";
reg = <0x2400>;
interrupts = <0x8 0x24 0x0 IRQ_TYPE_EDGE_BOTH>;
io-channels = <&pmx55_adc ADC5_DIE_TEMP>;
io-channel-names = "thermal";
#thermal-sensor-cells = <0>;
};
pmx55_adc: adc@3100 {
compatible = "qcom,spmi-adc5";
reg = <0x3100>;
#address-cells = <1>;
#size-cells = <0>;
#io-channel-cells = <1>;
interrupts = <0x8 0x31 0x0 IRQ_TYPE_EDGE_RISING>;
channel@0 {
reg = <ADC5_REF_GND>;
qcom,pre-scaling = <1 1>;
label = "ref_gnd";
};
channel@1 {
reg = <ADC5_1P25VREF>;
qcom,pre-scaling = <1 1>;
label = "vref_1p25";
};
channel@6 {
reg = <ADC5_DIE_TEMP>;
qcom,pre-scaling = <1 1>;
label = "die_temp";
};
channel@9 {
reg = <ADC5_CHG_TEMP>;
qcom,pre-scaling = <1 1>;
label = "chg_temp";
};
};
pmx55_gpios: gpio@c000 {
compatible = "qcom,pmx55-gpio", "qcom,spmi-gpio";
reg = <0xc000>;
Annotation
- Immediate include surface: `dt-bindings/iio/qcom,spmi-vadc.h`, `dt-bindings/interrupt-controller/irq.h`, `dt-bindings/spmi/spmi.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.