arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/qcom/qcom-ipq8064-v2.0.dtsi
Extension
.dtsi
Size
1032 bytes
Lines
70
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0

#include "qcom-ipq8064.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. IPQ8064-v2.0";

	aliases {
		serial0 = &gsbi4_serial;
	};

	chosen {
		stdout-path = "serial0:115200n8";
	};

	reserved-memory {
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		rsvd@41200000 {
			reg = <0x41200000 0x300000>;
			no-map;
		};
	};
};

&gsbi4 {
	qcom,mode = <GSBI_PROT_I2C_UART>;
	status = "okay";

	serial@16340000 {
		status = "okay";
	};
	/*
	 * The i2c device on gsbi4 should not be enabled.
	 * On ipq806x designs gsbi4 i2c is meant for exclusive
	 * RPM usage. Turning this on in kernel manifests as
	 * i2c failure for the RPM.
	 */
};

&pcie0 {
	compatible = "qcom,pcie-ipq8064-v2";
};

&pcie1 {
	compatible = "qcom,pcie-ipq8064-v2";
};

&pcie2 {
	compatible = "qcom,pcie-ipq8064-v2";
};

&sata {
	ports-implemented = <0x1>;
};

&ss_phy_0 {
	qcom,rx-eq = <2>;
	qcom,tx-deamp_3_5db = <32>;
	qcom,mpll = <5>;
};

&ss_phy_1 {
	qcom,rx-eq = <2>;
	qcom,tx-deamp_3_5db = <32>;
	qcom,mpll = <5>;
};

Annotation

Implementation Notes