arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/qcom/qcom-sdx65.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/qcom/qcom-sdx65.dtsi- Extension
.dtsi- Size
- 20220 bytes
- Lines
- 823
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/qcom,gcc-sdx65.hdt-bindings/clock/qcom,rpmh.hdt-bindings/gpio/gpio.hdt-bindings/interrupt-controller/arm-gic.hdt-bindings/power/qcom-rpmpd.hdt-bindings/soc/qcom,rpmh-rsc.hdt-bindings/interconnect/qcom,sdx65.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: BSD-3-Clause
/*
* SDX65 SoC device tree source
*
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
*/
#include <dt-bindings/clock/qcom,gcc-sdx65.h>
#include <dt-bindings/clock/qcom,rpmh.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/power/qcom-rpmpd.h>
#include <dt-bindings/soc/qcom,rpmh-rsc.h>
#include <dt-bindings/interconnect/qcom,sdx65.h>
/ {
#address-cells = <1>;
#size-cells = <1>;
qcom,msm-id = <458 0x10000>, <483 0x10000>, <509 0x10000>;
interrupt-parent = <&intc>;
memory {
device_type = "memory";
reg = <0 0>;
};
clocks {
xo_board: xo-board {
compatible = "fixed-clock";
clock-frequency = <76800000>;
clock-output-names = "xo_board";
#clock-cells = <0>;
};
sleep_clk: sleep-clk {
compatible = "fixed-clock";
clock-frequency = <32764>;
clock-output-names = "sleep_clk";
#clock-cells = <0>;
};
nand_clk_dummy: nand-clk-dummy {
compatible = "fixed-clock";
clock-frequency = <32764>;
#clock-cells = <0>;
};
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu0: cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a7";
reg = <0x0>;
enable-method = "psci";
clocks = <&apcs>;
power-domains = <&rpmhpd SDX65_CX_AO>;
power-domain-names = "perf";
operating-points-v2 = <&cpu_opp_table>;
};
};
firmware {
scm {
compatible = "qcom,scm-sdx65", "qcom,scm";
};
};
Annotation
- Immediate include surface: `dt-bindings/clock/qcom,gcc-sdx65.h`, `dt-bindings/clock/qcom,rpmh.h`, `dt-bindings/gpio/gpio.h`, `dt-bindings/interrupt-controller/arm-gic.h`, `dt-bindings/power/qcom-rpmpd.h`, `dt-bindings/soc/qcom,rpmh-rsc.h`, `dt-bindings/interconnect/qcom,sdx65.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.