arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/renesas/iwg20d-q7-common.dtsi- Extension
.dtsi- Size
- 6530 bytes
- Lines
- 375
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the iWave-RZ/G1M/G1N Qseven carrier board
*
* Copyright (C) 2017 Renesas Electronics Corp.
*/
/*
* SSI-SGTL5000
*
* This command is required when Playback/Capture
*
* amixer set "DVC Out" 100%
* amixer set "DVC In" 100%
*
* You can use Mute
*
* amixer set "DVC Out Mute" on
* amixer set "DVC In Mute" on
*
* You can use Volume Ramp
*
* amixer set "DVC Out Ramp Up Rate" "0.125 dB/64 steps"
* amixer set "DVC Out Ramp Down Rate" "0.125 dB/512 steps"
* amixer set "DVC Out Ramp" on
* aplay xxx.wav &
* amixer set "DVC Out" 80% // Volume Down
* amixer set "DVC Out" 100% // Volume Up
*/
/ {
aliases {
serial0 = &scif0;
serial3 = &scifb1;
ethernet0 = &avb;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/nfs ip=dhcp";
stdout-path = "serial0:115200n8";
};
audio_clock: audio_clock {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <26000000>;
};
lcd_backlight: backlight {
compatible = "pwm-backlight";
pwms = <&pwm3 0 5000000>;
brightness-levels = <0 4 8 16 32 64 128 255>;
default-brightness-level = <7>;
enable-gpios = <&gpio5 14 GPIO_ACTIVE_HIGH>;
};
lvds-receiver {
compatible = "ti,ds90cf384a", "lvds-decoder";
power-supply = <&vcc_3v3_tft1>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
lvds_receiver_in: endpoint {
remote-endpoint = <&lvds0_out>;
};
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.