arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/renesas/r7s72100-gr-peach.dts- Extension
.dts- Size
- 2855 bytes
- Lines
- 136
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
r7s72100.dtsidt-bindings/gpio/gpio.hdt-bindings/pinctrl/r7s72100-pinctrl.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Device Tree Source for the GR-Peach board
*
* Copyright (C) 2017 Jacopo Mondi <jacopo+renesas@jmondi.org>
* Copyright (C) 2016 Renesas Electronics
*/
/dts-v1/;
#include "r7s72100.dtsi"
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/r7s72100-pinctrl.h>
/ {
model = "GR-Peach";
compatible = "renesas,gr-peach", "renesas,r7s72100";
aliases {
serial0 = &scif2;
};
chosen {
bootargs = "ignore_loglevel rw root=/dev/mtdblock0";
stdout-path = "serial0:115200n8";
};
memory@20000000 {
device_type = "memory";
reg = <0x20000000 0x00a00000>;
};
flash@18000000 {
compatible = "mtd-rom";
reg = <0x18000000 0x00800000>;
bank-width = <4>;
device-width = <1>;
clocks = <&mstp9_clks R7S72100_CLK_SPIBSC0>;
power-domains = <&cpg_clocks>;
#address-cells = <1>;
#size-cells = <1>;
rootfs@600000 {
label = "rootfs";
reg = <0x00600000 0x00200000>;
};
};
leds {
status = "okay";
compatible = "gpio-leds";
led1 {
gpios = <&port6 12 GPIO_ACTIVE_HIGH>;
};
};
};
&pinctrl {
scif2_pins: serial2 {
bootph-all;
/* P6_2 as RxD2; P6_3 as TxD2 */
pinmux = <RZA1_PINMUX(6, 2, 7)>, <RZA1_PINMUX(6, 3, 7)>;
};
ether_pins: ether {
/* Ethernet on Ports 1,3,5,10 */
pinmux = <RZA1_PINMUX(1, 14, 4)>, /* P1_14 = ET_COL */
<RZA1_PINMUX(3, 0, 2)>, /* P3_0 = ET_TXCLK */
Annotation
- Immediate include surface: `r7s72100.dtsi`, `dt-bindings/gpio/gpio.h`, `dt-bindings/pinctrl/r7s72100-pinctrl.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.