arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/renesas/r8a7742-iwg21m.dtsi
Extension
.dtsi
Size
2112 bytes
Lines
124
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the iWave RZ/G1H Qseven SOM
 *
 * Copyright (C) 2020 Renesas Electronics Corp.
 */

#include "r8a7742.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	compatible = "iwave,g21m", "renesas,r8a7742";

	memory@40000000 {
		device_type = "memory";
		reg = <0 0x40000000 0 0x40000000>;
	};

	memory@200000000 {
		device_type = "memory";
		reg = <2 0x00000000 0 0x40000000>;
	};

	reg_3p3v: 3p3v {
		compatible = "regulator-fixed";
		regulator-name = "3P3V";
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
		regulator-always-on;
		regulator-boot-on;
	};
};

&extal_clk {
	clock-frequency = <20000000>;
};

&gpio0 {
	/* GP0_18 set low to select QSPI. Doing so will disable VIN2 */
	qspi-en-hog {
		gpio-hog;
		gpios = <18 GPIO_ACTIVE_HIGH>;
		output-low;
		line-name = "QSPI_EN";
	};
};

&i2c0 {
	pinctrl-0 = <&i2c0_pins>;
	pinctrl-names = "default";

	status = "okay";
	clock-frequency = <400000>;

	rtc@68 {
		compatible = "ti,bq32000";
		reg = <0x68>;
		interrupts-extended = <&gpio1 1 IRQ_TYPE_EDGE_FALLING>;
	};
};

&mmcif1 {
	pinctrl-0 = <&mmc1_pins>;
	pinctrl-names = "default";

	vmmc-supply = <&reg_3p3v>;
	bus-width = <4>;
	non-removable;
	status = "okay";
};

Annotation

Implementation Notes