arch/arm/boot/dts/renesas/r8a7793.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/renesas/r8a7793.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/renesas/r8a7793.dtsi
Extension
.dtsi
Size
45604 bytes
Lines
1536
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Device Tree Source for the R-Car M2-N (R8A77930) SoC
 *
 * Copyright (C) 2014-2015 Renesas Electronics Corporation
 */

#include <dt-bindings/clock/r8a7793-cpg-mssr.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/power/r8a7793-sysc.h>

/ {
	compatible = "renesas,r8a7793";
	#address-cells = <2>;
	#size-cells = <2>;
	interrupt-parent = <&gic>;

	aliases {
		i2c0 = &i2c0;
		i2c1 = &i2c1;
		i2c2 = &i2c2;
		i2c3 = &i2c3;
		i2c4 = &i2c4;
		i2c5 = &i2c5;
		i2c6 = &i2c6;
		i2c7 = &i2c7;
		i2c8 = &i2c8;
		spi0 = &qspi;
	};

	/*
	 * The external audio clocks are configured as 0 Hz fixed frequency
	 * clocks by default.
	 * Boards that provide audio clocks should override them.
	 */
	audio_clk_a: audio_clk_a {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};
	audio_clk_b: audio_clk_b {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};
	audio_clk_c: audio_clk_c {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <0>;
	};

	/* External CAN clock */
	can_clk: can {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		/* This value must be overridden by the board. */
		clock-frequency = <0>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a15";
			reg = <0>;
			clock-frequency = <1500000000>;
			clocks = <&cpg CPG_CORE R8A7793_CLK_Z>;

Annotation

Implementation Notes