arch/arm/boot/dts/rockchip/rk3188.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/rockchip/rk3188.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/rockchip/rk3188.dtsi
Extension
.dtsi
Size
18081 bytes
Lines
815
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2013 MundoReader S.L.
 * Author: Heiko Stuebner <heiko@sntech.de>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/clock/rk3188-cru.h>
#include <dt-bindings/power/rk3188-power.h>
#include "rk3xxx.dtsi"

/ {
	compatible = "rockchip,rk3188";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;
		enable-method = "rockchip,rk3066-smp";

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			reg = <0x0>;
			clocks = <&cru ARMCLK>;
			operating-points-v2 = <&cpu0_opp_table>;
			resets = <&cru SRST_CORE0>;
		};
		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			reg = <0x1>;
			operating-points-v2 = <&cpu0_opp_table>;
			resets = <&cru SRST_CORE1>;
		};
		cpu2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			reg = <0x2>;
			operating-points-v2 = <&cpu0_opp_table>;
			resets = <&cru SRST_CORE2>;
		};
		cpu3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			next-level-cache = <&L2>;
			reg = <0x3>;
			operating-points-v2 = <&cpu0_opp_table>;
			resets = <&cru SRST_CORE3>;
		};
	};

	cpu0_opp_table: opp-table-0 {
		compatible = "operating-points-v2";
		opp-shared;

		opp-312000000 {
			opp-hz = /bits/ 64 <312000000>;
			opp-microvolt = <875000>;
			clock-latency-ns = <40000>;
		};
		opp-504000000 {
			opp-hz = /bits/ 64 <504000000>;
			opp-microvolt = <925000>;
		};
		opp-600000000 {
			opp-hz = /bits/ 64 <600000000>;

Annotation

Implementation Notes