arch/arm/boot/dts/rockchip/rk3288-rock-pi-n8.dts
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/rockchip/rk3288-rock-pi-n8.dts
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/rockchip/rk3288-rock-pi-n8.dts- Extension
.dts- Size
- 443 bytes
- Lines
- 18
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
rk3288.dtsiarm/rockchip/rockchip-radxa-dalang-carrier.dtsirk3288-vmarc-som.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Copyright (c) 2019 Fuzhou Rockchip Electronics Co., Ltd
* Copyright (c) 2019 Vamrs Limited
* Copyright (c) 2019 Amarula Solutions(India)
*/
/dts-v1/;
#include "rk3288.dtsi"
#include <arm/rockchip/rockchip-radxa-dalang-carrier.dtsi>
#include "rk3288-vmarc-som.dtsi"
/ {
model = "Radxa ROCK Pi N8";
compatible = "radxa,rockpi-n8", "vamrs,rk3288-vmarc-som",
"rockchip,rk3288";
};
Annotation
- Immediate include surface: `rk3288.dtsi`, `arm/rockchip/rockchip-radxa-dalang-carrier.dtsi`, `rk3288-vmarc-som.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.