arch/arm/boot/dts/rockchip/rk3288-veyron-broadcom-bluetooth.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/rockchip/rk3288-veyron-broadcom-bluetooth.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/rockchip/rk3288-veyron-broadcom-bluetooth.dtsi- Extension
.dtsi- Size
- 576 bytes
- Lines
- 23
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Veyron (and derivatives) fragment for the Broadcom 43450 bluetooth
* chip.
*
* Copyright 2019 Google, Inc
*/
&uart0 {
bluetooth {
pinctrl-names = "default";
pinctrl-0 = <&bt_host_wake_l>, <&bt_enable_l>,
<&bt_dev_wake>;
compatible = "brcm,bcm43540-bt";
host-wakeup-gpios = <&gpio4 RK_PD7 GPIO_ACTIVE_HIGH>;
shutdown-gpios = <&gpio4 RK_PD5 GPIO_ACTIVE_HIGH>;
device-wakeup-gpios = <&gpio4 RK_PD2 GPIO_ACTIVE_HIGH>;
max-speed = <3000000>;
brcm,bt-pcm-int-params = [01 02 00 01 01];
};
};
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.