arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/rockchip/rk3288-veyron-chromebook.dtsi- Extension
.dtsi- Size
- 3917 bytes
- Lines
- 185
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
dt-bindings/clock/rockchip,rk808.hdt-bindings/input/input.hrk3288-veyron.dtsirk3288-veyron-analog-audio.dtsirk3288-veyron-edp.dtsirk3288-veyron-sdmmc.dtsi../cros-ec-keyboard.dtsi
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Veyron (and derivatives) board device tree source
* Chromebook specific parts
*
* Copyright 2015 Google, Inc
*/
#include <dt-bindings/clock/rockchip,rk808.h>
#include <dt-bindings/input/input.h>
#include "rk3288-veyron.dtsi"
#include "rk3288-veyron-analog-audio.dtsi"
#include "rk3288-veyron-edp.dtsi"
#include "rk3288-veyron-sdmmc.dtsi"
/ {
aliases {
/* Assign 20 so we don't get confused w/ builtin ones */
i2c20 = &i2c_tunnel;
};
gpio-charger {
compatible = "gpio-charger";
charger-type = "mains";
gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&ac_present_ap>;
};
lid_switch: lid-switch {
compatible = "gpio-keys";
pinctrl-names = "default";
pinctrl-0 = <&ap_lid_int_l>;
switch-lid {
label = "Lid";
gpios = <&gpio0 RK_PA6 GPIO_ACTIVE_LOW>;
wakeup-source;
linux,code = <SW_LID>;
linux,input-type = <EV_SW>;
debounce-interval = <1>;
};
};
/* A non-regulated voltage from power supply or battery */
vccsys: regulator-vccsys {
compatible = "regulator-fixed";
regulator-name = "vccsys";
regulator-boot-on;
regulator-always-on;
};
vcc33_sys: regulator-vcc33-sys {
vin-supply = <&vccsys>;
};
vcc_5v: regulator-vcc-5v {
vin-supply = <&vccsys>;
};
/* This turns on vbus for host1 (dwc2) */
vcc5_host1: regulator-vcc5-host1 {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio0 RK_PB3 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&host1_pwr_en>;
regulator-name = "vcc5_host1";
regulator-always-on;
regulator-boot-on;
Annotation
- Immediate include surface: `dt-bindings/clock/rockchip,rk808.h`, `dt-bindings/input/input.h`, `rk3288-veyron.dtsi`, `rk3288-veyron-analog-audio.dtsi`, `rk3288-veyron-edp.dtsi`, `rk3288-veyron-sdmmc.dtsi`, `../cros-ec-keyboard.dtsi`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.