arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/rockchip/rk3288-veyron-edp.dtsi- Extension
.dtsi- Size
- 2771 bytes
- Lines
- 142
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
- No C-style include directives detected by the generator.
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Google Veyron (and derivatives) fragment for the edp displays
*
* Copyright 2019 Google LLC
*/
/ {
backlight_regulator: regulator-backlight {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_pwr_en>;
regulator-name = "backlight_regulator";
vin-supply = <&vcc33_sys>;
startup-delay-us = <15000>;
};
panel_regulator: regulator-panel {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio7 RK_PB6 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&lcd_enable_h>;
regulator-name = "panel_regulator";
vin-supply = <&vcc33_sys>;
};
vcc18_lcd: vcc18-lcd {
compatible = "regulator-fixed";
enable-active-high;
gpio = <&gpio2 RK_PB5 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&avdd_1v8_disp_en>;
regulator-name = "vcc18_lcd";
regulator-always-on;
regulator-boot-on;
vin-supply = <&vcc18_wl>;
};
backlight: backlight {
compatible = "pwm-backlight";
brightness-levels = <0 255>;
num-interpolated-steps = <255>;
default-brightness-level = <128>;
enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
pinctrl-0 = <&bl_en>;
pwms = <&pwm0 0 1000000 0>;
post-pwm-on-delay-ms = <10>;
pwm-off-delay-ms = <10>;
power-supply = <&backlight_regulator>;
};
panel: panel {
compatible = "innolux,n116bge";
status = "okay";
power-supply = <&panel_regulator>;
backlight = <&backlight>;
panel-timing {
clock-frequency = <74250000>;
hactive = <1366>;
hfront-porch = <136>;
hback-porch = <60>;
hsync-len = <30>;
hsync-active = <0>;
vactive = <768>;
vfront-porch = <8>;
Annotation
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.