arch/arm/boot/dts/rockchip/rk3288-veyron-speedy.dts

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/rockchip/rk3288-veyron-speedy.dts

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/rockchip/rk3288-veyron-speedy.dts
Extension
.dts
Size
5079 bytes
Lines
325
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Google Veyron Speedy Rev 1+ board device tree source
 *
 * Copyright 2015 Google, Inc
 */

/dts-v1/;
#include "rk3288-veyron-chromebook.dtsi"
#include "rk3288-veyron-broadcom-bluetooth.dtsi"
#include "../cros-ec-sbs.dtsi"

/ {
	model = "Google Speedy";
	compatible = "google,veyron-speedy-rev9", "google,veyron-speedy-rev8",
		     "google,veyron-speedy-rev7", "google,veyron-speedy-rev6",
		     "google,veyron-speedy-rev5", "google,veyron-speedy-rev4",
		     "google,veyron-speedy-rev3", "google,veyron-speedy-rev2",
		     "google,veyron-speedy", "google,veyron", "rockchip,rk3288";
};

&cpu_alert0 {
	temperature = <65000>;
};

&cpu_alert1 {
	temperature = <70000>;
};

&cpu_crit {
	temperature = <90000>;
};

&edp {
	/delete-property/pinctrl-names;
	/delete-property/pinctrl-0;

	force-hpd;
};

&gpu_alert0 {
	temperature = <80000>;
};

&gpu_crit {
	temperature = <90000>;
};

&rk808 {
	pinctrl-names = "default";
	pinctrl-0 = <&pmic_int_l>;
};

&sdmmc {
	disable-wp;
	pinctrl-names = "default";
	pinctrl-0 = <&sdmmc_clk &sdmmc_cmd &sdmmc_cd_disabled &sdmmc_cd_pin
			&sdmmc_bus4>;
};

&vcc_5v {
	enable-active-high;
	gpio = <&gpio7 RK_PC5 GPIO_ACTIVE_HIGH>;
	pinctrl-names = "default";
	pinctrl-0 = <&drv_5v>;
};

&vcc50_hdmi {
	enable-active-high;
	gpio = <&gpio5 RK_PC3 GPIO_ACTIVE_HIGH>;

Annotation

Implementation Notes