arch/arm/boot/dts/rockchip/rv1103b.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/rockchip/rv1103b.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/rockchip/rv1103b.dtsi
Extension
.dtsi
Size
6379 bytes
Lines
240
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2026 Rockchip Electronics Co., Ltd.
 */

#include <dt-bindings/clock/rockchip,rv1103b-cru.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/pinctrl/rockchip.h>
#include <dt-bindings/soc/rockchip,boot-mode.h>

/ {
	#address-cells = <1>;
	#size-cells = <1>;

	compatible = "rockchip,rv1103b";

	interrupt-parent = <&gic>;

	arm-pmu {
		compatible = "arm,cortex-a7-pmu";
		interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			compatible = "arm,cortex-a7";
			reg = <0x0>;
			clocks = <&cru ARMCLK>;
			device_type = "cpu";
		};
	};

	timer {
		compatible = "arm,armv7-timer";
		clock-frequency = <24000000>;
		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>,
			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(1) | IRQ_TYPE_LEVEL_HIGH)>;
	};

	xin24m: oscillator-24m {
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "xin24m";
		#clock-cells = <0>;
	};

	pinctrl: pinctrl {
		compatible = "rockchip,rv1103b-pinctrl";
		rockchip,grf = <&ioc>;
		ranges;
		#address-cells = <1>;
		#size-cells = <1>;

		gpio0: gpio@20520000 {
			compatible = "rockchip,gpio-bank";
			reg = <0x20520000 0x200>;
			clocks = <&cru PCLK_PMU_GPIO0>, <&cru DBCLK_PMU_GPIO0>;
			gpio-controller;
			interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-controller;
			#gpio-cells = <2>;
			#interrupt-cells = <2>;
		};

Annotation

Implementation Notes