arch/arm/boot/dts/samsung/exynos3250-pinctrl.dtsi
Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/exynos3250-pinctrl.dtsi
File Facts
- System
- Linux kernel
- Corpus path
arch/arm/boot/dts/samsung/exynos3250-pinctrl.dtsi- Extension
.dtsi- Size
- 13397 bytes
- Lines
- 544
- Domain
- Architecture Layer
- Bucket
- arch/arm
- Inferred role
- Architecture Layer: configuration, schema, or hardware description
- Status
- atlas-only
Why This File Exists
CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
- CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.
Dependency Surface
exynos-pinctrl.h
Detected Declarations
- No top-level syscall, struct, function, initcall, or export declaration detected by the generator.
Annotated Snippet
// SPDX-License-Identifier: GPL-2.0
/*
* Samsung's Exynos3250 SoCs pin-mux and pin-config device tree source
*
* Copyright (c) 2014 Samsung Electronics Co., Ltd.
* http://www.samsung.com
*
* Samsung's Exynos3250 SoCs pin-mux and pin-config options are listed as device
* tree nodes in this file.
*/
#include "exynos-pinctrl.h"
#define PIN_IN(_pin, _pull, _drv) \
pin- ## _pin { \
samsung,pins = #_pin; \
samsung,pin-function = <EXYNOS_PIN_FUNC_INPUT>; \
samsung,pin-pud = <EXYNOS_PIN_PULL_ ##_pull>; \
samsung,pin-drv = <EXYNOS4_PIN_DRV_ ##_drv>; \
}
#define PIN_SLP(_pin, _mode, _pull) \
pin- ## _pin { \
samsung,pins = #_pin; \
samsung,pin-con-pdn = <EXYNOS_PIN_PDN_ ##_mode>; \
samsung,pin-pud-pdn = <EXYNOS_PIN_PULL_ ##_pull>; \
}
&pinctrl_0 {
gpa0: gpa0-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpa1: gpa1-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpb: gpb-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc0: gpc0-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpc1: gpc1-gpio-bank {
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <2>;
};
gpd0: gpd0-gpio-bank {
Annotation
- Immediate include surface: `exynos-pinctrl.h`.
- Atlas domain: Architecture Layer / arch/arm.
- Implementation status: atlas-only.
Implementation Notes
- This generated page is the file-by-file coverage layer; curated subsystem chapters should link here when they synthesize a multi-file control flow.
- Core OS pages should be promoted from atlas-only to deep-reviewed when they explain data structures, invariants, locking, lifecycle, and C implementation snippets.
- Driver-family pages are intentionally pattern-oriented unless they are part of the selected PCIe/NVMe representative device path.