arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/samsung/exynos4210-universal_c210.dts
Extension
.dts
Size
14616 bytes
Lines
691
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's Exynos4210 based Universal C210 board device tree source
 *
 * Copyright (c) 2012-2013 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Device tree source file for Samsung's Universal C210 board which is based on
 * Samsung's Exynos4210 rev0 SoC.
 */

/dts-v1/;
#include "exynos4210.dtsi"
#include <dt-bindings/gpio/gpio.h>

/ {
	model = "Samsung Universal C210 based on Exynos4210 rev0";
	compatible = "samsung,universal_c210", "samsung,exynos4210", "samsung,exynos4";
	chassis-type = "handset";

	memory@40000000 {
		device_type = "memory";
		reg = <0x40000000 0x10000000
		       0x50000000 0x10000000>;
	};

	aliases {
		mmc0 = &sdhci_0;
		mmc1 = &sdhci_2;
		mmc2 = &sdhci_3;
	};

	chosen {
		bootargs = "root=/dev/mmcblk0p5 rw rootwait earlyprintk panic=5 maxcpus=1";
		stdout-path = "serial2:115200n8";
	};


	fixed-rate-clocks {
		xxti {
			compatible = "samsung,clock-xxti";
			clock-frequency = <0>;
		};

		xusbxti {
			compatible = "samsung,clock-xusbxti";
			clock-frequency = <24000000>;
		};

		pmic_ap_clk: pmic-ap-clk {
			/* Workaround for missing clock on PMIC */
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	vemmc_reg: voltage-regulator {
		compatible = "regulator-fixed";
		regulator-name = "VMEM_VDD_2_8V";
		regulator-min-microvolt = <2800000>;
		regulator-max-microvolt = <2800000>;
		gpio = <&gpe1 3 GPIO_ACTIVE_HIGH>;
		enable-active-high;
	};

	wlan_pwrseq: sdhci3-pwrseq {
		compatible = "mmc-pwrseq-simple";
		reset-gpios = <&gpe3 1 GPIO_ACTIVE_LOW>;
	};

Annotation

Implementation Notes