arch/arm/boot/dts/samsung/exynos4212.dtsi

Source file repositories/reference/linux-study-clean/arch/arm/boot/dts/samsung/exynos4212.dtsi

File Facts

System
Linux kernel
Corpus path
arch/arm/boot/dts/samsung/exynos4212.dtsi
Extension
.dtsi
Size
3456 bytes
Lines
158
Domain
Architecture Layer
Bucket
arch/arm
Inferred role
Architecture Layer: configuration, schema, or hardware description
Status
atlas-only

Why This File Exists

CPU and platform-specific kernel glue: boot entry, traps, syscall entry, interrupts, page tables, context switch, and low-level barriers.

Dependency Surface

Detected Declarations

Annotated Snippet

// SPDX-License-Identifier: GPL-2.0
/*
 * Samsung's Exynos4212 SoC device tree source
 *
 * Copyright (c) 2012 Samsung Electronics Co., Ltd.
 *		http://www.samsung.com
 *
 * Samsung's Exynos4212 SoC device nodes are listed in this file. Exynos4212
 * based board files can include this file and provide values for board specific
 * bindings.
 *
 * Note: This file does not include device nodes for all the controllers in
 * Exynos4212 SoC. As device tree coverage for Exynos4212 increases, additional
 * nodes can be added to this file.
 */

#include "exynos4x12.dtsi"

/ {
	compatible = "samsung,exynos4212", "samsung,exynos4";

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu-map {
			cluster0 {
				core0 {
					cpu = <&cpu0>;
				};
				core1 {
					cpu = <&cpu1>;
				};
			};
		};

		cpu0: cpu@a00 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0xa00>;
			clocks = <&clock CLK_ARM_CLK>;
			clock-names = "cpu";
			operating-points-v2 = <&cpu0_opp_table>;
			#cooling-cells = <2>; /* min followed by max */
		};

		cpu1: cpu@a01 {
			device_type = "cpu";
			compatible = "arm,cortex-a9";
			reg = <0xa01>;
			clocks = <&clock CLK_ARM_CLK>;
			clock-names = "cpu";
			operating-points-v2 = <&cpu0_opp_table>;
			#cooling-cells = <2>; /* min followed by max */
		};
	};

	cpu0_opp_table: opp-table-0 {
		compatible = "operating-points-v2";
		opp-shared;

		opp-200000000 {
			opp-hz = /bits/ 64 <200000000>;
			opp-microvolt = <900000>;
			clock-latency-ns = <200000>;
		};
		opp-300000000 {
			opp-hz = /bits/ 64 <300000000>;
			opp-microvolt = <900000>;
			clock-latency-ns = <200000>;

Annotation

Implementation Notes